Nov 12, 2026 From Better Chips to Better Systems: A Conversation with imec CEO Patrick Vandenameele Ahead of SEMICON Europa 2026 Imec CEO Patrick Vandenameele says AI is shifting semiconductor innovation toward system-level integration, combining logic, memory, photonics and packaging. He stresses collaboration and faster paths from research to manufacturing to boost efficiency and competitiveness. SEMI

Sponsor Reduce Thermal Challenges in Next-Gen Chip Packages Henkel's new LOCTITE ABLESTIK CDF 900 conductive die attach film supports efficient heat dissipation and robust package reliability. Henkel AG & Co.

Samsung Reportedly Eyes Early 2027 for 3D Cube-H Advanced Packaging Development, Featuring Hybrid Bonding Samsung targets early 2027 to develop 3D Cube-H hybrid bonding technology, enabling finer chip stacking for AI processors and HBM. The 6μm interconnect pitch could boost performance, efficiency and foundry competitiveness. TrendForce

Oxide Reduction for Reliable Power Electronics Manufacturing As power densities increase and components become smaller, oxide layers and surface contamination become critical manufacturing risks. Discover practical approaches for oxide reduction, cleaning and activation in power electronics production. Download the whitepaper. Technical Paper

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Samsung, SK hynix monitor Nvidia leadership uncertainty Samsung Electronics and SK hynix are monitoring Nvidia's leadership uncertainty amid reports of a possible CEO replacement. While concerns persist over executive relationships and future business plans, both chipmakers expect existing supply agreements to remain largely unaffected. Yonhap News Agency

Nvidia board meeting to decide CEO Jensen Huang's fate stretches into evening Nvidia's board is reportedly considering CEO Jensen Huang's removal following allegations of two extramarital affairs, including links to an alleged Chinese spy. The reports triggered an investigation and intensified pressure on Nvidia shares amid broader AI market concerns. CNBC

Sponsor From Heterogeneous Integration to 3D Front-End of Line Technologies This paper explores how hybrid and fusion wafer bonding have become foundational technologies in enabling both "More than Moore" heterogeneous integration and "More Moore" transistor scaling & recent advancements driving future architectures. EV Group

Technical Papers ■ Beneath the Surface: The Rise of Intelligent X-Ray Inspection ■ The Future of Flip Chip Bonding: How R-LAB and R-LTC Enable Next-Generation AI and HPC Packaging ■ Selective Alkaline Wet Etching of Al and AlCu Using a Phosphoric and Nitric Acid Free Formulation ■ Hybrid & Fusion Bonding: from Heterogeneous Integration to 3D Front-End of Line Technologies ■ Why Metal TIM Warpage Simulations Fail—and How to Fix Them ■ Oxide Reduction for Reliable Power Electronics Manufacturing ■ Bond front velocity in lubrication-mediated bonding of flexible substrates MORE TECHNICAL PAPERS

Sponsor Die Bonding Made Easy The DL Technology X-Form needles are custom manufactured for conductive epoxy dispensing in die bonding applications. Each needle is machined using DL's patented EZ-FLO. DL Technology

Credo at OCP 2026: Micro-Emitter Optics and AI Interconnect Reliability At OCP Global Summit, Credo highlights evolving AI interconnect demands, introducing micro-emitter technology and its 1.6T ZeroFlap Active Light Cable, which delivers copper-level reliability over 50 meters with lower power consumption, reduced weight and a slimmer profile. EE Times

Diamond Foundry unveils first 200mm single-crystal diamond Diamond Foundry has developed the first 200mm single-crystal diamond wafer, overcoming key manufacturing hurdles. The breakthrough could boost AI chip cooling and performance while advancing scalable production toward 300mm wafers. Semiconductor Today

Sponsor Number 1 in bond testers Sigma is the best bond tester the market has to offer. It comes with game-changing automation capabilities for operator-free loading, testing, and analyzing. Learn more. xyztec

TSMC sets up $500 million fund to back the chip ecosystem TSMC is establishing a $500 million investment company to acquire strategic stakes in semiconductor firms and related businesses. The move expands its venture strategy, strengthens AI partnerships with OpenAI and Anthropic, and reduces reliance on Nvidia. Innovation Origin Plus

What Taiwanese chip giant TSMC gains from taking stakes in OpenAI and Anthropic's AI race TSMC is investing up to US$1 billion in OpenAI and Anthropic while establishing a strategic investment arm. The move strengthens its ties with AI developers, provides demand insights, and helps manage capacity constraints amid expanding semiconductor investments. South China Morning Post

Sponsor How LAPLACE® Laser Assisted Bonding Saves Energy LAPLACE® enables fast, localized laser bonding with minimal heat exposure—cutting energy use while ensuring precision for sensitive advanced packaging processes. Watch Demo. PacTech

AMD teams up with Samsung Electronics on next-generation embedded processors AMD and Samsung are developing next-generation embedded processors that combine enterprise memory and storage. The sixth-generation EPYC Embedded 9006 delivers up to 1.8× greater throughput for industrial computing and memory testing. Yonhap News Agency

Siemens to acquire Lauterbach to expand semiconductor design capabilities Siemens will acquire Lauterbach, combining chip verification and software debugging technologies to strengthen its EDA portfolio. The deal aims to speed error detection, enable earlier software testing and shorten semiconductor development cycles. Electronics World

Sponsor Dedicated Tool for Process Development Advanced plating capability at Uyemura Tech Center: Process Development, UBM, pilot production. ENIG, ENEPIG, EPIG/EPAG, RAIG immersion gold; all substrates. On-site analysis. Uyemura

Carbon engineering turns insulating boron nitride into a wafer-scale p-type semiconductor University of Tokyo researchers developed p-type boron carbon nitride (BCN), achieving uniform growth across a 2-inch wafer. The material shows promising transistor performance, advancing complementary 2D electronics and future 3D semiconductor integration. Nanowerk

Sponsor Protect Solder Joint Reliability with Proper Gold Removal Discover how controlled gold removal, robotic hot solder dipping, and testing help reduce that risk. Circuit Technology Center’s technical paper explores the process controls behind reliable results. Circuit Technology Center

Elon Musk's Terafab targets 1 million wafers a month after 2032 — planned 700,000 monthly memory wafers could rival Samsung's entire estimated DRAM production capacity Elon Musk's Terafab plans to produce one million wafers monthly after 2032, including 700,000 memory wafers and over 300,000 logic wafers. The company is accelerating equipment procurement despite aggressive timelines and limited semiconductor manufacturing experience. Toms Hardware