June 15, 2026

Samsung Reportedly in Talks for Google 2nm TPU I/O Die Order Google is considering Samsung Foundry to produce a 2nm memory I/O die for its next-generation Icefish TPU, while TSMC may build the 1.4nm compute die. The move could diversify supply chains, expand HBM capacity, and boost Samsung's foundry business ahead of 2028 production. TrendForce

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Chip Industry Week In Review Cadence and Intel Foundry signed a multi-year deal to advance design co-optimization & develop PDKs for Intel's 14A process. Nvidia, SK hynix partnered on AI memory. Teradyne, TEL introduced packaging test solution. VinRobotics, Infineon launched humanoid robotics collaboration. Semiconductor Engineering

Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications This study demonstrates that molded flip chip BGA packages with optimized EMC materials and process parameters achieve superior warpage control and reliability performance compared to conventional FCBGA designs. Technical Paper

Sponsor Contamination Control Balazs™ provides technical expertise in identifying and controlling Airborne Molecular Contamination (AMC) and Surface Molecular Contamination (SMC) for improving process and product yields. Balazs Nanoanalysis

Infineon to open chip fabrication plant in Germany Infineon Technologies prepares to open its €5 billion Dresden semiconductor fab on July 2, backed by €1 billion EU subsidies. The plant boosts power chip output for AI data centers and supports Europe’s push for semiconductor self-reliance. Taipei Times

Out of the shadows: Huawei's 'chip queen' steps back into the spotlight with scaling law He Tingbo, Huawei's semiconductor chief, reemerges to present the Tau Scaling Law, claiming transistor density gains without EUV lithography. The framework challenges Moore's Law by prioritizing signal timing & introduces LogicFolding, sparking debate over its feasibility & impact. South China Morning Post

Sponsor Reflow Oven and Wave Soldering Machine Maintenance Cleaning Maintenance cleaning is imperative. Investment in a cleaning schedule and chemistry creates reliable processes to extend equipment life. KYZEN

Technical Papers Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications MORE TECHNICAL PAPERS

Sponsor Dedicated Tool for Process Development Advanced plating capability at Uyemura Tech Center: Process Development, UBM, pilot production. ENIG, ENEPIG, EPIG/EPAG, RAIG immersion gold; all substrates. On-site analysis. Uyemura

UCLA's $125M Semiconductor Hub: "We Want High Impact, Not Incremental Research" UCLA Samueli partners with Broadcom, Applied Materials, GlobalFoundries, Meta, Synopsys to launch a $125 million semiconductor hub that drives AI chip innovation, uniting academia and industry to pursue high-risk research and overcome compute, memory, and interconnect limits. EE Times

Minister defends TSMC amid US suit Taiwan's economic affairs minister Kung Ming-hsin expresses confidence in TSMC's patent compliance after US lawmakers urge a potential import ban over alleged infringement. An ITC judge expects a preliminary ruling this month, with a final decision due in October. Taipei Times

Sponsor Proven Flip-Chip Flux for AI Packages WS-641 is a proven high-performance flip-chip flux for 2.5D packaging, trusted by leading OSATs to deliver consistent results & reliability in advanced CoW applications. Indium Corporation

Indian Firm Scales Single-Walled Carbon Nanotube Production for Batteries and Chips Carbon nanotubes are emerging for semiconductors, batteries, and water treatment as Bengaluru-based NoPo Nanotechnologies scales single-walled production. The startup builds a pilot plant and new facility, using HiPco process and tight control of 200 parameters. EE Times

Ahead of SpaceX IPO, Elon Musk addresses ASML employees as part of push into chip manufacturing Elon Musk addressed ASML employees ahead of taking SpaceX public, highlighting the chipmaker's role in his planned Texas Terafab plant. He praised ASML's EUV technology, which enables advanced chip production essential for AI-focused ventures at Tesla, SpaceX, and xAI. CNBC

Sponsor Die-on-Tab for Compound Semiconductors This white paper explains why die-on-tab is critical for GaN and GaAs RF power devices, improving heat dissipation, reliability, and system life. Download now. StratEdge Corporation

Quantum of promise: How to build a quantum chip Quantum computing combines semiconductor engineering with complex physics, but remains far smaller than the silicon industry. While quantum systems rely on a single QPU and qubits in superposition, companies like IBM continue advancing scalable superconducting hardware. Data Centre Dynamics

RISC-V Targets Data Centers, Edge AI, Space RISC-V now targets data centers, edge AI, and space missions as industry standardization and RVA23 server specs accelerate commercial adoption, with major chip launches, rising investment, and growing software support positioning it as a scalable alternative to ARM and x86. EE Times

Sponsor Effect of Package Warpage and Composite CT on Failure Modes Researchers analyze board-level reliability of surface mount devices in thermal cycling, identifying failure modes via warpage and strain data. Akrometrix

To beat chip crunch, Chinese firm inks memory deal bigger than its sales Biwin signed a $1.86 billion two-year agreement to secure flash memory chips, exceeding its annual revenue. The company locks in supply from 2026 to 2028 as AI-driven data centre demand tightens global memory markets and drives prices higher. South China Morning Post

Sponsor Auer Carries of Hermetic Packages for Seam Sealing Hermetic Packages and Covers will be sealed one at a time, with automated seam sealing using AI. The Robotic Cover Sealer (RCS) is a cleanroom seal processor. MicroCircuit Laboratories, LLC