February 13, 2026

Chiplets and 3D-ICs Add New Electrical and Mechanical Challenges Chiplet adoption is transforming data center chip design, raising costs and intensifying reliability risks. Engineers battle thermal stress, packaging variability, and multi-die failures as Siemens EDA, Cadence, and Synopsys roll out advanced modeling and verification tools. Semiconductor Engineering

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VIEWPOINT 2026: Ira Leventhal, Vice President, Research & Venture, Advantest America My 2025 viewpoint highlighted the Era of Complexity—the convergence of AI/HPC scale, sustainability demands, and shifting geopolitics. Advanced packaging and heterogeneous integration introduce new failure modes and limit test access, making shift left test essential and turning reliability into a lifecycle commitment. ... Advantest America

The Evolution of Inspection and Metrology in the AI Era AI's rise drives demand for advanced processors, shifting the industry to chiplet architectures with high-bandwidth memory. This transformation introduces new challenges in semiconductor manufacturing, especially in inspection and metrology. Technical Paper

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Carbon nanotube 'sandpaper' polishes semiconductor surfaces down to a few atoms KAIST researchers led by Sanha Kim developed carbon nanotube "nano sandpaper" that polishes semiconductor surfaces with near-atomic precision, cuts defects by 67%, and eliminates slurry waste, boosting chip performance and enabling greener manufacturing. Phys.org

Samsung starts mass production of next-gen AI chips Samsung Electronics Co has begun mass production of its next-generation HBM4 memory chips, delivering over 40 percent faster speeds to power AI data centers. The move positions Samsung ahead of rivals including SK Hynix Inc and targets major customers like Nvidia Corp. Taipei Times

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Technical Papers Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications Eliminating Interfacial Delamination in High-Power Automotive Devices MORE TECHNICAL PAPERS

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LEDs Enter the Nanoscale Startup Polar Light Technologies unveiled sub-500 nm blue LEDs, while researchers at ETH Zurich and Zhejiang University pushed nanoLED pixels down to 100 nm and 90 nm. Despite efficiency trade-offs, these advances could enable ultra-high-resolution VR displays and on-chip photonics. IEEE Spectrum

Memory price surge of 'more than 600%' squeezes China's device makers AI-fueled data center demand has triggered a global memory crunch, driving component prices up more than 600%. Chinese smartphone makers like Xiaomi and Transsion are cutting output and facing higher broadband costs, while Huawei Technologies remains comparatively resilient. South China Morning Post

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China's Lenovo warns of 'prolonged' memory crunch, looks to AI for rebound Lenovo Group reported a 21 percent quarterly profit drop as soaring memory prices doubled DRAM costs and strained margins. Despite an 18% revenue rise, the company warned of prolonged supply imbalances but expects AI-driven devices to sustain double-digit growth. South China Morning Post

Nvidia CEO praises Foxconn's AI server leadership at company sports event At Foxconn's annual sports carnival, Nvidia CEO Jensen Huang praised the companies' decade-long partnership, calling 2025 a record year. Foxconn leads the AI server market with over 50% share and plans to double weekly cabinet output by 2026. Digitimes

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AI Inference Needs A Mix-And-Match Memory Strategy AI inference spans diverse workloads that strain hardware in new ways, driving a shift from single-GPU systems to disaggregated designs. Companies like NVIDIA split prefill and decode across GDDR, HBM, and LPDDR to cut costs, reduce latency, and boost throughput. Semiconductor Engineering

AI, GPU, and HPC Data Centers: The Infrastructure Behind Modern AI AI is pushing compute beyond enterprise limits, accelerating the rise of purpose-built AI data centers. These facilities tightly integrate GPUs, high-bandwidth memory, low-latency networks, advanced cooling, and power systems to run massive AI training and inference efficiently. Semiconductor Engineering

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UCIe's Major Technical Components Are Now In Place The UCIe Consortium released UCIe 3.0, doubling die-to-die data rates to 64 GT/s for 2D and 2.5D designs and enhancing manageability. The update addresses AI-driven chiplet demands, improving interoperability and enabling scalable, high-bandwidth data center architectures. Semiconductor Engineering

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