January 14, 2026

Wafer Probe Struggles To Adapt To Multi-Die Assemblies Wafer probe, once a routine semiconductor screening step, is now a critical yield risk in AI-class, multi-die devices. Rising I/O counts, larger chip sizes, and advanced packaging amplify mechanical stress, making electrical pass/fail data insufficient for ensuring device reliability. Semiconductor Engineering

Sponsor Flip Chip Bonding / C4 technology High pression process of assembly and connection technology (AVT) for contacting unhoused semiconductor chips by means of balls - so-called "bumps". Tresky Automation

VIEWPOINT 2026: Nitin Parekh, CEO, Via Automation In today's semiconductor industrial landscape, downtime is more costly than ever. Unplanned machine downtime cost manufacturers more than $1.5 trillion globally per year. The cost of a single hour of downtime has surged by 50% in just two years. Similarly, semiconductor manufacturing is inefficient ... Via Automation

The Economics of Electronic Component Salvage and Reuse This paper explores the feasibility and benefits of salvaging and reconditioning the leads and pads of electronic components, focusing on high-value components such as microprocessors, microcontrollers, and artificial intelligence chips. Technical Paper

Sponsor Magazine loader to test lead frames Hands-free automatic bond testing with a Sigma MAG magazine handler. Optional with SEMI S2 safety cabinet and/or loadport for top and front-loading (OHT and AGV). xyztec

Arizona fabs could meet US' chip demand: economist TSMC may expand its Arizona operations to six–eight fabs, producing 150,000 wafers monthly, nearly covering US demand for AI and high-performance chips. The move, part of a tariff deal, could create a dual-hub model while raising costs and geopolitical stakes. Taipei Times

Prices of 8-inch wafers to rise 20 percent Chipmakers are set to raise 8-inch wafer prices by up to 20% this year as TSMC and Samsung retire older capacity, tightening supply. Rising AI and consumer electronics demand is driving higher fab utilization and early orders from PC makers. Taipei Times

Sponsor AIT ORMET® TLPS for Component Attach AIT ORMET®TLPS is proven for outstanding reliability for component attaches and MLCC build-up for high temperature applications beyond 175ºC Ormet® TLPS

Technical Papers EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications Eliminating Interfacial Delamination in High-Power Automotive Devices RAIG Minimizes Corrosion, Allows Higher Gold on ENEPIG A Universal AI-Powered Segmentation Model for PCBA & Semiconductor MORE TECHNICAL PAPERS

Sponsor 170 semiconductor experts speak up What keeps telecom experts up at night? As networks push for more speed and reliability, semiconductors must evolve. See how they’re tackling AI, integration, and materials in our latest Research Report. Henkel AG & Co.

Chip demand fuels recovery in machine exports Taiwan's machinery industry rebounded strongly in 2025, with exports rising 9.1% to US$31.86 billion. Growth was driven by electronic and testing equipment, while machine tool exports fell, challenged by weak demand, currency strength, and global competition. Taipei Times

India aims to be among the major semiconductor hubs by 2032, says Union Minister Ashwini Vaishnaw India is accelerating its domestic semiconductor push, with 10 approved units and four plants set to start production in 2026. Backed by AI, EV, and electronics demand, the government is expanding design, talent, and manufacturing to become a global chip hub by 2032. ELE Times

Sponsor Tech Paper - The Essential Guide for High-Reliability BGA Component Re-balling This paper outlines best practices and challenges in reballing Ball Grid Array (BGA) components. Download this free tech paper. Circuit Technology Center

A Clear Advantage: Precision Glass Carrier Inspection For AI And HPC Markets Advanced packaging is turning to glass carriers to enable HBM, chiplets, and 3D integration, prized for flatness, rigidity, and optical alignment. AI-powered inspection spots surface, subsurface, and stress defects, lifting yields and reliability. Semiconductor Engineering

Semiconductor Manufacturing In The AI Era At the 2025 PDF Solutions Users Conference, CEO John Kibarian said AI is driving growth as chip complexity soars. He urged collaboration, data use and AI automation to hit $1T revenue by 2030 amid 3D packaging, supply chain splits and talent gaps. Semiconductor Engineering

Sponsor Die-Module Attach for High Power Devices High flexibility film and paste adhesives for large die and module attach. Outstanding thermal conductivity with low moisture absorption stress-free bonding. AI Technology, Inc.

Secure Data Sharing Becoming Critical For Chip Manufacturing Semiconductor companies are sharing data to lift yields and trace failures. Secure, anonymized data powers predictive analytics and early fault detection, helping fabs, fabless firms and data centers speed production while protecting IP worldwide. Semiconductor Engineering

HBM4 Sticks With Microbumps, Postponing Hybrid Bonding JEDEC's revised HBM4 standard allows 16-high memory stacks without hybrid bonding, delaying but not canceling adoption. HBM4 boosts AI with wider, faster interfaces and better efficiency, while hybrid bonding enables future taller, thinner stacks. Semiconductor Engineering

Sponsor Nordson Sight™ Nordson Sight™ delivers scalable SPC with traceability, rapid setup, intuitive interface, and powerful analysis tools for improved manufacturing yields. Nordson Test & inspection

Inside CEA-Leti's Push to Industrialize MicroLED Interconnects CEA-Leti is launching a three-year R&D program to develop microLED optical interconnects, aiming to boost bandwidth density and energy efficiency for mid-range AI. The effort unites chipmakers, fiber suppliers, and integrators to speed solutions. EE Times

Sponsor Cleaning Silicone and Hydrocarbon Residue Using Atmospheric Plasma Residue from dicing tape and silicone trays can hinder chip bonding. ONTOS effectively cleans surfaces before bonding. Read more. Ontos