March 10, 2026

China’s chip bosses endorse semiconductor push in next 5-year plan China’s semiconductor firms, including AI chipmaker Cambricon and OSAT leader Tongfu Microelectronics, backed the 15th five-year plan prioritizing chips, advanced processes, materials and AI hardware, while officials urged stronger infrastructure, domestic chip adoption and deeper Yangtze River Delta collaboration. South China Morning Post

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Fallout From Nvidia-Groq Deal Validates AI Chip Startup Landscape Nvidia’s $20B licensing deal with Groq signals rising demand for non-GPU AI accelerators and exposes GPU weaknesses in inference. The move validates heterogeneous chip architectures, boosts investor confidence in AI startups, and intensifies competition in inference hardware. EE Times

Current Characterization of Various Cu RDL Designs In Wafer Level Packages (WLP) This study evaluates copper redistribution layer fusing currents in wafer-level packaging through experiments and simulations, finding that silicon thickness significantly improves heat dissipation and fusing performance. Technical Paper

Sponsor In situ hydrogen plasmas — A New Paradigm for Advanced Packaging Hydrogen plasmas drive breakthroughs in 3D chip technology, enabling ultra-dense interconnects and faster signal speeds above 5 GHz. Surfx Technologies

Samsung workers mull late-May strike Unionized workers at Samsung Electronics began voting on an 18-day strike over pay, with results due March 18. The unions demand a 7% raise and bonus transparency, raising concerns that a May walkout could disrupt memory production for AI chips. Taipei Times

Six Trends Driving 3D IC Innovations in the AI Era Rapid AI compute growth is pushing semiconductor design beyond transistor scaling, driving adoption of 3D ICs. Engineers now rely on system-technology co-optimization, co-packaged optics, advanced materials, and microfluidic cooling to manage interconnect, power, and thermal challenges in next-generation AI systems. EE Times

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Technical Papers Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications Eliminating Interfacial Delamination in High-Power Automotive Devices MORE TECHNICAL PAPERS

Sponsor RDL Interposers – USA Fabrication Organic Substrates/High Density Interposers - 20µm Dielectrics - 12µm Traces - 50µm "Stay Flat" Cores - Quick Turns. Learn more. Advanced Component Labs, Inc.

Nvidia’s $4B Photonics Venture: What You Need to Know Nvidia is investing $4 billion in suppliers Lumentum and Coherent to secure components for AI centers. The deal combines equity, supply commitments, and joint R&D to expand indium-phosphide laser capacity and accelerate co-packaged optics for faster GPU cluster interconnects. EE Times

China’s chip industry seeks more state support for AI dominance China’s semiconductor leaders urged stronger state support for AI chips and critical materials during the “two sessions,” proposing pricing oversight and a national computing-power market while leveraging rare-earth dominance and expanding domestic chip equipment and materials to counter foreign restrictions. South China Morning Post

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Research Bits: Mar. 9 Researchers developed three semiconductor advances: Ulsan National Institute of Science and Technology created a low-noise clock circuit, Pennsylvania State University built ultra-miniature 2D-material thermal sensors, and Korea Advanced Institute of Science and Technology engineered carbon-nanotube “sandpaper” for precise, cleaner chip manufacturing. Semiconductor Engineering

The Future of Semiconductors: Engineering in the Convergence era The semiconductor industry is shifting toward system-level innovation as silicon scaling alone no longer drives progress. Converging domains—software, physics, packaging, and AI—demand integrated design and continuous verification, with digital twins and agentic AI emerging as essential tools for managing growing complexity. Semiconductor Engineering

Sponsor Copper vs silver: a turning point for WBG die attach Copper sintering is challenging silver's dominance in power semiconductors. Read how new materials are enabling high performance at lower cost. Henkel AG & Co.

Data Centers In Space? SpaceX, xAI, startups, and Google research are advancing plans for orbital data centers powered by constant solar energy. Yet huge power needs, cooling limits, launch costs, radiation, and maintenance challenges mean systems would rely on swarms of smaller satellites. Semiconductor Engineering

Ubitium Tapes Out First ‘Universal’ RISC-V Chip German startup Ubitium completed the first silicon tape-out of its universal RISC-V processor on Samsung’s 8-nm process, aiming to replace fragmented embedded chips with a single architecture that handles CPU, AI, and real-time workloads, simplifying development and supply chains. EE Times

Sponsor IR Layer Release Technology for 3D Packaging and Logic Scaling Ultra-thin layer transfer from silicon carriers with nanometer precision using an IR laser and inorganic release layers revolutionizes 3D packaging & logic scaling. EV Group

Apple's First Made-in-U.S. Chips Fall Short of Claim Apple's claim of producing over 100 million U.S.-made chips in 2026 is partly misleading, as wafers from TSMC's Arizona plant must be shipped to Taiwan for advanced packaging. U.S. facilities won't scale until 2028, keeping reliance on Asia. EE Times

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