March 23, 2026

Novel Dual-gate Transistor Design Enables Stable 3D Semiconductor Stacking Researchers at DGIST developed a dual-gate, vertically stacked transistor that eliminates nanoscale leakage, maintains sharp on/off switching, and scales cost-effectively, promising denser, low-power 3D semiconductors and flexible electronics. Nanowerk

Sponsor Is copper sintering the future of WBG semiconductors? Silver dominates today, but copper is catching up fast. Explore the cost, reliability, and sustainability shifts reshaping GaN and SiC die attach technology. Henkel AG & Co.

Chip Industry Week In Review The Iran war is straining the global chip industry, triggering energy and material shortages in Taiwan, Korea, and beyond. Helium and tungsten supply constraints, export restrictions & rising prices disrupt production, while Nvidia, Samsung, SK hynix & Micron ramp up AI chip output. Semiconductor Engineering

Revolutionizing IC Packaging with High-Density RDL Technology Amkor's S-SWIFT packaging technology addresses advanced IC packaging challenges through an embedded trace RDL process, providing higher bandwidth die-to-die interconnects for AI, HPC, and data center applications with improved reliability. Technical Paper

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Middle East Conflict Is Rewiring Global Supply Chains Escalating conflict in the Middle East is disrupting global tech supply chains, threatening semiconductors and AI infrastructure. Shortages of helium, bromine, petrochemicals and strained shipping hubs are driving delays, raising electronics costs, and slowing computing growth. EE Times

Samsung Reportedly Eyes Long-Term Memory Deals with Google, Microsoft; May Include $10B+ Prepayments Memory makers are pursuing multi-year supply deals with Big Tech to stabilize AI-driven demand. Samsung is in talks with Google and Microsoft on prepayment-backed contracts, while Micron advances similar agreements to improve visibility, pricing stability, and investment planning. TrendForce

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Technical Papers Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications Eliminating Interfacial Delamination in High-Power Automotive Devices MORE TECHNICAL PAPERS

Sponsor IR Layer Release Technology for 3D Packaging and Logic Scaling Ultra-thin layer transfer from silicon carriers with nanometer precision using an IR laser and inorganic release layers revolutionizes 3D packaging & logic scaling. EV Group

Answering the Call: The Critical Role of Veterans in Powering America's Semiconductor Workforce The U.S. semiconductor industry is surging, but a talent gap threatens growth, with 67,000 roles at risk. Leaders urge tapping military veterans' skills, while industry, academia, and programs like STAR build pathways to connect them to high-tech careers. Semiconductor Industry Association

ASML Reportedly Eyes Hybrid Bonding Equipment, Precision Edge May Reshape Advanced Packaging Landscape Rumors say ASML is exploring hybrid bonding tools to enter advanced packaging. Partnering with Prodrive Technologies and VDL-ETG, it aims to leverage precision tech amid rising demand, though no launch is confirmed. TrendForce

Sponsor How LAPLACE® Laser Assisted Bonding Saves Energy LAPLACE® enables fast, localized laser bonding with minimal heat exposure—cutting energy use while ensuring precision for sensitive advanced packaging processes. Watch Demo. PacTech

OpenClaw's ChatGPT moment sparks concern that AI models are becoming commodities OpenClaw, a lobster-themed AI coding project by Austrian developer Peter Steinberger, has surged to prominence at GTC, enabling autonomous AI agents on personal computers. Nvidia, OpenAI & Anthropic now support it, highlighting open-source AI's power & adoption challenges. CNBC

New math model tackles current crowding in 2D thin-film nanoelectronics Researchers at the University of Michigan developed a precise mathematical model for anisotropic 2D materials like MoS₂ and graphene, accurately predicting current crowding and spreading resistance in nanoelectronic devices, enabling more reliable, high-performance thin-film contacts. Nanowerk

Sponsor Hermetic Microelectronic Package Seam Seal Technical paper on technology that delivers a pristine internal atmosphere for hi-rel microelectronic components. Process automation, including AI, and standard tooling utilized in die and wire bonding is standard. MicroCircuit Laboratories, LLC

Memory crisis latest: What we learned from the world's top producers this week Micron stunned Wall Street with record revenue, earnings, and guidance signaling roughly 80% gross margins, yet its stock fell. With Samsung and SK Hynix also locking in multi-year AI-driven memory deals, analysts see a prolonged supply shortage shaping the chip market. CNBC

GTC 2026 Keynote: Long Live the Inference King At GTC 2026, Nvidia CEO Jensen Huang showcased the company's inference prowess, unveiled the Vera Rubin CPU-GPU, and highlighted CUDA's 25-year legacy, stressing token economics, extreme co-design, and unmatched AI throughput for global applications. EE Times

Sponsor Advanced Packaging: Flexible Die Bonder Featuring a large, versatile working area, the MRSI-705 die bonder handles many input and output types, including 300mm wafers. MRSI

What's the right path for AI? At an MIT symposium, Karen Hao and Paola Ricaurte urged moving beyond hyperscale AI toward smaller, purpose-built models. They highlighted energy efficiency, human-centered design, and public input to ensure AI delivers equitable, real-world community benefits. MIT News

Sponsor Are Your BGA Rework Operators Competent? Can every operator handle your BGA rework equally well? In real life, in all but just a few situations, the answer is no. Why is this so? Circuit Technology Center