April 27, 2026

TSMC Plans Chip Packaging Plant in Arizona by 2029 TSMC will build and operate an advanced chip packaging facility in Arizona by 2029, adding CoWoS and 3D-IC capabilities. The move aims to ease supply-chain bottlenecks, reduce shipments to Taiwan, and expand US manufacturing alongside partners like Amkor. Taiwan News

Sponsor Automotive chips need materials that DO NOT fail We asked semiconductor specialists what defines the future of automotive packaging. Reliability, thermal management, and sustainability topped the list. Free Research Report. Henkel AG & Co.

Why Chip Sovereignty Is No Longer About Chips—But Systems Governments push chip sovereignty, but AI is shifting value from standalone fabs to integrated systems spanning accelerators, CPUs, packaging, memory, and software. Industry now prioritizes heterogeneous architectures and global supply chains over chip-level control. EE Times

RAIG Minimizes Corrosion, Allows Higher Gold on ENEPIG Paper describes a mixed reaction RAIG electrolyte that minimizes galvanic corrosion and allows higher ENEPIG gold thicknesses, enabling robust designs and world-class quality on target with minimal variation. Technical Paper

Sponsor "Build Up" I/C Packages -- USA Fabrication High layer counts. Low CTE material sets. 20µm Dielectrics /12µm Traces - ITAR Approved - 50um "Stay Flat" Cores. Learn more. Advanced Component Labs, Inc.

Chip Industry Week In Review Marvell acquired Polariton Technologies, while Onto Innovation partnered with Rigaku and bought a 27% stake. Tesla will use Intel 14A for its Terafab AI chips. Arteris and GF's MIPS collaborate, and TSMC outlined A14 in 2028 and A13 in 2029. Semiconductor Engineering

TSMC Latest Roadmap: A12, A13 for 2029 Without High-NA EUV; A16 Volume Production Delayed to 2027 TSMC detailed its roadmap to 2029, unveiling A12 and A13 nodes, extending N2 with N2U, and delaying A16 to 2027. It targets AI, HPC, and mobile gains while avoiding High-NA EUV, emphasizing cost efficiency, performance, and design compatibility. TrendForce

Sponsor Thermally Conductive, Low Outgassing Epoxy Master Bond EP54TC is a thermally conductive, electrically insulating adhesive that combines good physical properties and the ability to transfer heat rapidly and effectively. Master Bond

Technical Papers Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications Eliminating Interfacial Delamination in High-Power Automotive Devices MORE TECHNICAL PAPERS

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SK hynix Receives 2026 IEEE Corporate Innovation Award SK hynix won the 2026 IEEE Corporate Innovation Award in New York, marking its first win. It earned recognition for advancing AI computing through High Bandwidth Memory innovation and stable mass production, strengthening its role in global AI memory solutions. EE Times

Where we stand after 60 years of Moore's law In 1965, Gordon Moore predicted transistor-driven exponential growth in computing power and falling costs, later known as Moore's Law. While chip scaling has slowed since the 2000s, its legacy continues shaping semiconductors and inspiring AI cost reductions today. MSN

Sponsor Openair-Plasma for Semiconductor Manufacturing Openair-Plasma for semiconductor production is an alternative to vacuum plasma. Typical apps are wire bonding, die bonding & pre-molding. Download here. Plasmatreat GmbH

Intel's stock has best day since 1987, soaring 24% as chipmaker shows signs of a turnaround Intel shares surged 24%, their best day since 1987, as AI-driven demand and strong earnings boosted investor confidence. Under CEO Lip-Bu Tan, revenue rose 7.2% and data center growth hit 22%, signaling a renewed competitive position. CNBC

Intelligent Cost Optimization is a Competitive Advantage Companies transform cost optimization into a competitive edge by investing with precision, not cutting blindly. Manufacturers use teardown analysis to dissect products, reveal cost drivers, benchmark rivals, and guide engineers to reduce over-specification and boost efficiency. EE Times

Sponsor Ultra-Thin Wafer Handling Achieve ≤ 10 µm device thinning with Brewer Science’s BrewerBOND® VersaLayer system: a thermoplastic layer coats device features, while a low-stress adhesive bonds them. Brewer Science

What Hormuz Exposed About Our Semiconductor Supply Chain Closure of the Strait of Hormuz triggers a semiconductor supply chain crisis, doubling helium prices and disrupting logistics. Chipmakers face delays, rising costs, and AI-driven capacity shifts, exposing deep reliance on concentrated gas supplies and fragile global production chokepoints. EE Times

Intel's stock soars 20% as results top estimates, with chipmaker showing signs of growth Intel crushed expectations with strong Q1 earnings and revenue, sending shares up 20%. Data center growth and rising CPU demand signal an AI-driven turnaround, though losses widened and challenges in manufacturing and customer adoption remain. CNBC

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System-in-Package Challenges Chipmakers and systems firms overcome reticle limits with chiplet designs, distributing workloads across diverse nodes and teams. Experts warn success hinges on managing data flow, physical interactions, power-performance tradeoffs, and long-term package reliability. Semiconductor Engineering

Sponsor Die-on-Tab for Compound Semiconductors This white paper explains why die-on-tab is critical for GaN and GaAs RF power devices, improving heat dissipation, reliability, and system life. Download now. StratEdge Corporation