May 8, 2026

Nvidia CEO says AI partnership with Corning will ‘revitalize American manufacturing’ Nvidia CEO Jensen Huang highlighted a partnership with Corning to expand U.S. optical connectivity manufacturing, calling AI infrastructure the largest buildout in history. The deal boosts domestic supply chains, creates jobs, and advances silicon photonics for future data centers. CNBC

Sponsor Epoxy & Adhesive DIE Bonding One of the most common methods of creating a connection between chip and substrate is the gluing process. Extreme precise epoxy & adhesive bonding processes for sustainable bonds. Tresky Automation

Nvidia inks US$500 million deal with fiber-optic maker Corning Nvidia buys $500 million in Corning shares to deepen an AI infrastructure partnership. Corning will boost US fiber capacity over 50% with new plants, while both firms expand high-speed optical networks powering AI data centers and chips. Taipei Times

Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications This paper explores how, with chips becoming smaller and mightier, automated x-ray metrology delivers game-changing quality and efficiency in wafer and panel level applications, while delving into industry trends. Technical Paper

Sponsor Reflow Solderable TIM1 Thermal Grease AIT's CGR7016 & CGR7019-LB series are proven reliable for thermal interface usage at extreme temperatures. 100% chip to heat-spreader lid seal after multiple reflow soldering. AI Technology, Inc.

MediaTek launches AI data center MediaTek launches a 45MW AI data center in Miaoli to boost chip R&D, completing a 15MW first phase. Powered by Nvidia B200 chips and immersion cooling, it processes 138B tokens monthly despite component shortages, with expansion planned. Taipei Times

Stacking 2D materials on bulk semiconductors yields smarter, faster photodetectors A review shows 2D/3D van der Waals heterostructures combine atomically thin materials with bulk semiconductors to boost photodetectors, enabling faster, more sensitive, tunable, and neuromorphic in-sensor computing, while addressing band engineering, interfaces, and fabrication challenges for next-generation vision systems. Nano Werk

Sponsor 2026 IEEE ECTC – May 26-29 in Orlando The Electronic Components & Technology Conference delivers the best in packaging, components & microelectronic technologies, held at the JW Marriott & The Ritz-Carlton Grande Lakes Resort, Orlando, FL. ECTC

Technical Papers Automated X-Ray Metrology: Enhancing Quality and Efficiency in Wafer and Panel-Level Applications Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications MORE TECHNICAL PAPERS

Sponsor Openair-Plasma for Semiconductor Manufacturing Openair-Plasma for semiconductor production is an alternative to vacuum plasma. Typical apps are wire bonding, die bonding & pre-molding. Download here. Plasmatreat GmbH

TSMC to build 9 new plants this year to boost global footprint TSMC expands globally, building nine new plants this year across Taiwan, US, Japan, and Germany. It advances 3nm, 2nm, and 1.4nm fabs while boosting AI-driven advanced packaging capacity to support high-performance computing and semiconductor demand growth. Taiwan News

The Emergence Of Electronics Digital Twins For Software-Defined Vehicles Electronics digital twins (eDTs) extend traditional digital twins by modeling full electronics and software systems in software-defined vehicles, enabling lifecycle validation, AI-driven simulation, faster development, reduced costs, continuous updates, and improved safety across automotive and other industries through ecosystem platforms. Semiconductor Engineering

Sponsor Die-to-Wafer Bonding Simplified Researchers developed a plasma Die-to-Wafer bonding process, eliminating complex carrier wafers & costly vacuum systems, enhancing 3DIC & integrated photonics applications. Ontos Equipment Systems

Securing Chiplet-Based Platforms: Distributed Trust With Centralized Authority In chiplet architectures, security shifts from monolithic SoC trust to platform-level governance. A Main Security Chiplet enforces centralized trust decisions, while lightweight roots of trust in each chiplet enable identity, secure boot, communication, and lifecycle protection across the system. Semiconductor Engineering

Powering AI At Scale: Why 3D-ICs Demand A New Approach To Power Integrity The semiconductor industry shifts from transistor scaling to advanced 2.5D and 3D packaging, chiplets, and heterogeneous integration. AI workloads increase power density and complexity, making power integrity electro-thermal, system-level challenge driven by dense interconnects, dynamic currents, and shrinking voltage margins. Semiconductor Engineering

Sponsor Fusion and Hybrid Bonding Experts EVG's industry-leading process solutions, expertise and HI Competence Center accelerate the development and implementation of heterogeneous integration technology. EV Group

Building AI Without Guardrails AI rapidly transforms semiconductor design, embedding across EDA, verification, and chip architecture, but governance lags behind innovation. Fragmented regulations struggle to address rising IP theft and security risks, highlighting urgent need for unified standards balancing innovation, accountability, and protection. Semiconductor Engineering

2.5D + 3D = “3.5D”! Semiconductor firms shift beyond Moore’s law toward advanced packaging, using 3.5D integration to combine 2.5D and 3D approaches. This hybrid design boosts AI performance, improves bandwidth and efficiency, and balances cost, yield, and thermal challenges through selective vertical stacking. Semiconductor Engineering

Sponsor Temporary Bonding Materials Boost throughput and quality with Brewer Science's BrewerBOND® VersaLayer temporary bonding system for high-temperature (400˚C) and high-stress applications. Brewer Science

What Is Power Usage Effectiveness (PUE) In Data Centers? Data centers consumed about 415 TWh in 2024, around 1.5% of global electricity, and may reach 2–3% by 2030. Industry tracks efficiency using PUE, which compares total energy use with computing power, aiming for a perfect score of 1.0. Semiconductor Engineering

Sponsor Automotive chips need materials that DO NOT fail We asked semiconductor specialists what defines the future of automotive packaging. Reliability, thermal management, and sustainability topped the list. Free Research Report. Henkel AG & Co.