April 23, 2026

TSMC Unfolds Map for Process, Packaging Tech TSMC unveils chip roadmap featuring A14 1.4-nm GAA process and A13/A12 derivatives for AI and edge, alongside N2U 2-nm. It introduces photonics and advanced packaging to cut power use and latency while scaling AI data-center performance without high-NA EUV. EE Times

Sponsor Highly Thermally & Electrically Conductive TLPS via Filing Paste New filing highlights advanced sintered metal paste enabling faster installation, superior heat dissipation, higher conductivity, and reliable thermal drain performance without long processing cycles. Ormet TLPS

SK hynix Breaks Ground on P&T7 Advanced Packaging Fab in Cheongju, Wafer-level Packaging Set for 2028 Ramp SK hynix ramps up AI memory expansion, breaking ground on its KRW 19T P&T7 advanced packaging plant in Cheongju while advancing U.S. plans. Surging HBM demand lifts prices and margins, with Q1 profits set to hit record highs ahead of earnings. TrendForce

Peer viewpoint: semiconductor innovation for telecommunication networks Telecom networks are evolving rapidly to handle higher speeds & volumes. Henkel surveyed 170 semiconductor leaders to reveal how performance, reliability & advanced integration are driving next-gen infrastructure. Technical Paper

Sponsor Die-on-Tab for Compound Semiconductors This white paper explains why die-on-tab is critical for GaN and GaAs RF power devices, improving heat dissipation, reliability, and system life. Download now. StratEdge Corporation

TSV Complexity Leads To Manufacturing Bottleneck Through-silicon vias (TSVs) connect stacked chips but shrinking dimensions increase cost, defects & signal issues. AI-driven demand strains limited packaging capacity, while complex etch, fill & wafer thinning processes & tight tolerances challenge manufacturing yield & scalability. Semiconductor Engineering

Server CPU Prices Up as Much as 20% Since March; Intel May Raise Prices Another 8%–10% in 2H26 Surging AI demand is driving CPU price hikes, with consumer chips up 5–10% and server CPUs 10–20%. Intel and AMD plan further increases as lead times stretch and capacity tightens, with constraints likely sustaining higher pricing through 2027. TrendForce

Sponsor Proven Flip-Chip Flux for AI Packages WS-641 is a proven high-performance flip-chip flux for 2.5D packaging, trusted by leading OSATs to deliver consistent results & reliability in advanced CoW applications. Indium Corporation

Technical Papers Alpha Particle Emissions: An Overlooked Risk for Soft Errors in Advanced Packaging Revolutionizing IC Packaging with High-Density RDL Technology EOTPR Fine pitch probing for die-to-die interconnect failure analysis in chiplet devices Die-on-Tab for Compound Semiconductors: Enabling Advanced RF Power Systems Package Assembly Design Kits: The Future of Advanced Package Design Novel Molded FCBGA Package Platform For Highly Reliable Automotive Applications Eliminating Interfacial Delamination in High-Power Automotive Devices MORE TECHNICAL PAPERS

Sponsor Die-Module Attach (Pastes & Films) Die-Attach Adhesives with low moisture absorption for MSL Level-1 applications for reliability. Outstanding thermal conductivity with low moisture absorption- stress-free bonding. AI Technology, Inc.

TSMC plans to open chip packaging plant in Arizona by 2029, executive says TSMC plans to open an advanced chip packaging plant in Arizona by 2029, expanding CoWoS and 3D-IC capacity. The company aims to ease AI chip bottlenecks as it brings packaging work currently done in Taiwan closer to US customers. Reuters

Powerchip predicts substantial jump in quarterly gross margin and profits Powerchip Semiconductor Manufacturing raises chip prices amid tight supply and AI-driven demand, expects strong gross margin and profit growth this quarter. The company sees rising utilization, a return to profitability & expanding memory, packaging & 3D AI foundry businesses. Taipei Times

Sponsor Seam Seal Hermetic Packages with Auer Carriers and 3D Trays MCL's Robotic Cover Sealer (RCS) enables the utilization of industry standard tooling used in Die and Wire Bonding. Reduced handling, decreased cost and an RCS sealing process provides the lowest cost in hermetic package sealing. MicroCircuit Laboratories, LLC

Micron pushes US Congress to curb Chinese competitors Micron Technology urges US lawmakers to pass the MATCH Act, which would tighten export controls on chipmaking equipment to China, targeting CXMT, YMTC and SMIC, while restricting foreign service access, aiming to curb China’s memory industry on national security grounds. Taipei Times

Google unveils chips for AI training and inference in latest shot at Nvidia Google is splitting training and inference into specialized eighth-generation TPUs to challenge Nvidia in AI hardware. The chips deliver up to 2.8x training performance and 80% better inference, use SRAM-based architecture for low-latency AI agents, and see growing adoption. CNBC

Sponsor Amkor Antenna in Package (AiP) Solutions As demand for packages that support 5G increase, Amkor is ready with the successful implementation of AiP/AoP technology. Learn more. Amkor Technology, Inc.

AI Agent Designs a RISC-V CPU Core From Scratch In 2025, Verkor.io used its agentic AI system Design Conductor to autonomously design VerCore, a RISC-V CPU core in 12 hours, achieving performance comparable to a 2011 Intel Celeron and marking a milestone in end-to-end AI chip design. IEEE Spectrum

Indian Researchers Develop Molecular Memristor for Neuromorphic Computing IISc Bangalore's CeNSE researchers develop a ruthenium-based molecular memristor delivering 14-bit resolution and 4.1 TOPS/W, enabling energy-efficient neuromorphic computing. They design crossbar AI inference chips for edge applications, targeting 22 nm fabrication. EE Times

Sponsor Quick Turn I/C Package Substrates USA Fabrication – THIN "Stay Flat" CORES Organic Substrates/High Density Interposers - 20µm Dielectrics /12µm Traces 50um Cores - ITAR Approved. Learn more. Advanced Component Labs, Inc.

The Changing ASICs Landscape: the Shift Toward Chip Disaggregation AI reshapes ASIC design toward system-specific, modular, disaggregated architectures. Advanced packaging and multi-die integration optimize performance via cross-domain collaboration, but raise verification complexity, driving reusable IP, co-design, and partnerships. EE Times

Sponsor Accurate Corner Fill Inspection SQ3000™ Nordson Test & Inspection advances industry software with AI-driven algorithms and SQ3000's MRS technology, delivering unmatched accuracy by eliminating reflections for precise, high-quality measurement applications. Nordson Test & Inspection