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Jun 18, 2026 Beyond Chiplets, CMOS 2.0 Moves Scaling into the Circuit Imec's CMOS 2.0 roadmap redefines chip scaling by splitting circuits at the transistor level and reconnecting them in dense 3D architectures. The design tackles AI bottlenecks, boosting bandwidth, cutting energy use, and tightly integrating logic, memory, and I/O. EE Times Jun 18, 2026 Accelerating Sustainability with SEMI Smart Manufacturing: An Industry 4.0 Technology Roadmap for Semiconductor Device Makers to Improve Sustainability SEMI's Smart Manufacturing Initiative unveiled a roadmap that uses Industry 4.0/5.0 technologies, digital twins, and AI to help semiconductor fabs cut emissions, water use, and hazardous waste while boosting ROI, yields, and operational efficiency. SEMI Jun 18, 2026 TSMC's latest chip packaging breakthrough promises lower costs and better performance TSMC is developing CoPoS, a panel-based chip packaging technology designed to cut manufacturing costs, improve efficiency, and support larger AI processors. Expected by 2028, CoPoS could complement CoWoS and help power next-gen AI chips with greater performance. Yahoo! Finance Jun 18, 2026 Ball game's over—the US is out of the AI chip market in China China is resisting renewed dependence on U.S. chips despite approval of Nvidia H200 sales. Analysts warn broader U.S. restrictions may erode American firms' competitiveness while accelerating China's drive for semiconductor self-sufficiency. Brookings Jun 18, 2026 US holds off on adding DeepSeek to blacklist The Trump administration has delayed plans to blacklist DeepSeek, CXMT, and more than 100 Chinese firms, seeking to avoid heightened tensions with Beijing. The pause, the longest in over a decade, has fueled concerns that U.S. export-control enforcement is losing momentum. Taipei Times Jun 18, 2026 United States Outsourced Semiconductor Assembly and Test (OSAT) Market Growth Is Critical for the Future of Advanced IC Packaging, Miniaturization and Supply Chain Resilience DataM Intelligence's latest OSAT market report examines regional trends, segment performance, competition, revenue growth, and CAGR forecasts. It highlights key growth drivers, emerging opportunities, and strategies shaping future market expansion. Open PR Jun 18, 2026 Built-In Memory. Built-In Confidence. Memory shortages and rising DRAM prices are creating new challenges for edge AI, increasing costs and delaying deployments. NVIDIA positions its Jetson platform as a solution, combining LPDDR5 memory & optimized software to reduce supply-chain risks & speed development. EE Times Jun 18, 2026 AI Isn't the Real Bottleneck in Autonomy; Wireless Is Autonomous drones, robots and edge systems rely on wireless links prioritizing reliability and low latency over peak throughput. Autonomy expands into infrastructure safety and defense; resilient radios ensure control and mission continuity. EE Times Jun 18, 2026 Signoff of Synthesis-Optimized Registers Synopsys/ Suresh Barla shows how chip designers achieve sign-off confidence in complex designs by optimizing RTL for power performance and area managing verification challenges and ensuring netlists meet sign-off quality across large multi-block chips. Semiconductor Engineering Jun 18, 2026 Designing Chips That Can Explain Themselves Industry experts highlighted how on-chip data analytics is becoming essential for improving semiconductor resilience, faster fault detection & better system optimization. The discussion explored emerging challenges, design strategies, and technologies that enhance chip reliability. Semiconductor Engineering |
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