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Gold Mitigation: What Engineers Need to Know
When gold-plated component surfaces enter the solder joint, reliability can be at risk. This technical paper examines gold removal, robotic hot solder dip processing, testing, and process control.
Circuit Technology Center
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| Industry Paper |
Current Characterization of Various Cu RDL Designs In Wafer Level Packages (WLP)
This study evaluates copper redistribution layer fusing currents in wafer-level packaging through experiments and simulations, finding that silicon thickness significantly improves heat dissipation and fusing performance.
Amkor Technology, Inc.
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S-Connect™: Advanced Bridge Die Solution
Introducing Amkor's new S-Connect™, S-SWIFT™ with an embedded silicon bridge, delivering improved power integrity and signal performance.
Amkor Technology
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