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February 26, 2026
VIEWPOINT 2026: Adrienne Downey, Senior Market Research Analyst, TechInsightsAI and HPC Drive New Advanced Packaging Developments in 2026
As AI hyperscaling continues, the industry is increasingly focused on reducing power consumption. SiPho can reduce networking power by roughly 60-70% for certain switch to application-specific integrated circuit (ASIC) links compared with traditional pluggable and electrical approaches. Actual savings depend on lane speed, module design and system topology. TSMC's Compact Universal Photonic Engine (COUPE) has been announced and demonstrated and is being positioned to integrate with TSMC's 3D/heterogeneous packaging family (SoIC/CoWoS). Momentum is expected to accelerate in 2026 with expanded CPO roadmaps, increased pilots, and broader ecosystem demos, with phased volume adoption for select customers. High-bandwidth memory four (HBM4) is being sampled and qualified by suppliers, with taller stack heights such as 12-Hi and 16-Hi under evaluation. Yield, thermal and reliability challenges are expected to shape how quickly these configurations move into high-volume production. In parallel, glass substrates and panel-level packaging remain an active area of development, with accelerated standards activity and pilot programs anticipated in 2026, though a full transition to glass in high-volume manufacturing is unlikely within that timeframe. Adrienne Downey, Senior Market Research Analyst TechInsights https://www.techinsights.com/ |
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