VIEWPOINT 2019: Thomas Uhrmann, Director of Business Development, EV Group

Thomas Uhrmann, Director of Business Development, EV Group

The semiconductor industry is experiencing a profound shift in what is driving its future innovation. Increasingly, fewer device manufacturers are able to follow the path of "More Moore" and lithographically scale to smaller design nodes due to the exponentially rising costs associated with optical and EUV lithography in the sub-10-nn realm.

At the same time, scaling can no longer enable performance improvements in many parts of an IC. Instead, "More than Moore" - where innovation is achieved by combining different semiconductor components with different design nodes, sizes and/or materials in a single package - is proving its ability to increase device performance, and is enlarging the industry's focus to integration, stacking and packaging.

In this More than Moore era, wafer bonding is increasingly crucial to achieve manufacturing and packaging success. However, the key 3D package types associated with heterogeneous integration - 3D SIP (system in package), 3D SIC (stacked IC), and 3D SoC (system on chip) -- have different wafer bonding requirements.

For IDMs, foundries and OSATs alike, it's crucial to partner with the right process equipment provider that has the breadth and depth of wafer bonding solutions and expertise to help them navigate the More than Moore landscape.

Thomas Uhrmann, Director of Business Development
EV Group
http://www.evgroup.com/

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