Technical Paper: Defluxing of Copper Pillar Bumped Flip-Chips

Technical Paper

Defluxing of Copper Pillar Bumped Flip-Chips

The process of creating interconnects on flip chips using copper pillar bumping has gained popularity as an alternative to the conventional solder bumping method. This article aims to explore how the performance of copper pillar interconnects can be improved by means of defluxing.
ZESTRON

Complete this form to download this Technical Paper.

More Technical Papers

■	Improving SiC Power Devices with Laser Ohmic Contact Formation
■	Defluxing of Copper Pillar Bumped Flip-Chips
■	Functional testing of 0.3mm pitch WLP
■	Vacuum Fluxless Reflow Technology for Fine Pitch Interconnect Bumping Applications
■	Master Advanced Packaging Inspection
■	Optimized Reflow Solder TIMs Processes for Heterogeneous Packages
■	Packaging Solutions for Unique Markets
■	Keys to Component Lead Tinning Success
■	How Semiconductor Fabricators are Working Through Global FFKM Shortages
■	Mobile Antennas and Power Devices that Break the Mold

Full Technical Paper List

We search for industry news so you don't need to.

Search

Free Newsletter Subscription
Semiconductor Packaging News is built for professionals who bear the responsibility of looking ahead, imagining the future, and preparing for it.

Insert Your Email Address