Technical Paper

Defluxing of Copper Pillar Bumped Flip-Chips



The process of creating interconnects on flip chips using copper pillar bumping has gained popularity as an alternative to the conventional solder bumping method. This article aims to explore how the performance of copper pillar interconnects can be improved by means of defluxing.
ZESTRON

Complete this form to download this Technical Paper.
Your Name


Your E-mail
Your Company


Your State, or Country if outside USA

More Technical Papers
CMP Carrier Head Film Replacement Testing
Space-Proofing Power: CoolCAD's Mission to Radiation-Harden Power Semiconductor Devices
Does Water Do the Job on Its Own?
Ensuring Large Die Durability in AI and HPC Advanced Packages
Chiplets and Advanced Packaging: Changing System Test and Failure Analysis
Emerging Technologies for Advanced 3D Package Characterization Enable the More-than-Moore Era
Package and Die Attach Material Comparisons for High Power GaN Devices
Compatibility of pH-Neutral Cleaning Agent with Under-bump Materials
S-SWIFT® Packaging with Fine Pitch Embedded Trace RDL
Cleaning of Silicone and Hydrocarbon Contact Residue Using Atmospheric Plasma

Full Technical Paper List
Free Newsletter Subscription
Semiconductor Packaging News is built for professionals who bear the responsibility of looking ahead, imagining the future, and preparing for it.

Insert Your Email Address