|
|
| |
| |
| Sponsored Content |
 |
|
|
|
Ensuring compatibility between suppliers with standardization |
|
| General-purpose chiplet providers need a standardized set of design models to ensure operability in electronic design automation (EDA) workflows. |
|
|
|
|
Learn about the proposed chiplet models developed by the Chiplet Design Exchange (CDX)
Separating typically single homogeneous, system-on-chip (SoC) ASIC device into different, unpackaged ASIC devices (chiplets) continues to gain traction.
Adoption requires industry standardizations to ensure compatibility between suppliers. The proposed set of standardized chiplet models includes thermal, physical, mechanical, IO, behavioral, power, signal and power integrity, electrical properties, and test models, as well as documentation to facilitate the integration of the chiplets into a design.
For successful industry-wide 3D IC packaging, these models should be:
- Electronically readable for use in design workflows
- Leverage existing industry standards that are readily available
- Compatible across the industry, without regard for supply for an open ecosystem and supply chain
|
|
|
|
|
© 2022 Siemens Industry Software Inc.
5800 Granite Parkway, Suite 600, Plano, TX 75024 USA | +1 800 498 5351 |
| Contact Us | Our Privacy Policy |
| Siemens and the Siemens logo are registered trademarks of Siemens AG. All other logos, trademarks, registered trademarks, or service marks used herein are the property of their respective holders. |
|
|
|
