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October 27, 2008

Verigy to Highlight Ramp Acceleration at ITC 2008

ITC 2008
Verigy Booth #93

Live Demos of Silicon Debug Solution Offered

CUPERTINO, Calif. – Verigy (NASDAQ: VRGY), a premier semiconductor test company, will address important issues impacting the semiconductor industry at the International Test Conference (ITC) next week at the Santa Clara Convention Center. Verigy product experts and executives will address ITC audiences in nine scheduled presentations, including technical papers, panel sessions, tutorials and the Vision ATE 2020 event occurring in conjunction with ITC. Verigy, a gold level ITC conference sponsor, will demonstrate the Inovys Silicon Debug Solution at its booth.

“In the current economic climate, the entire semiconductor ecosystem is faced with tremendous pressure to accelerate time-to-entitled yield at geometries of 90 nanometers and below, while closely managing the cost-of-test,” said Hans-Juergen Wagner, vice president and general manager of Verigy’s Semiconductor Test Solutions. “Verigy’s Silicon Debug Solution offers these manufacturers of complex SoC devices more efficient debug to speed time to volume production.”

Demos of Silicon Debug Solution Offered at ITC

The Silicon Debug Solution combines the revolutionary FaultInsyte software with the scalable and flexible Verigy V93000 SoC test system. The result is an integrated solution that reduces the time required for fault detection and diagnosis by efficiently mapping electrical failures to physical defects on complex SoC devices. This significantly shortens time to debug, ramp and volume production for manufacturers using processes at 90 nm and below. Verigy is accepting orders for the Silicon Debug Solution now.

To schedule a private, interactive demo of the Verigy Inovys Silicon Debug Solution during ITC, contact Patrice Riley at patrice.riley@verigy.com or +1 925-660-1752.

Verigy Will Address Key Topics at ITC

At ITC, Verigy product experts and executives will address several key technology areas impacting semiconductor manufacturers today.

Wed., Oct. 29

8:30 to 10 a.m.

Debbora Ahlgren, vice president and chief marketing officer, Corporate Presentation Session: “When is the Same Old Thing the Hottest New Thing?”

8:30 to 10 a.m.

Jose Moreira, Bernhard Roth and Heidi Barnes will join speakers from NEC Electronics, Advanced Micro Devices and Agilent Technologies for a lecture, “Beyond 10 Gbps? Challenges of Characterizing Future I/O Interfaces.”

4:15 to 5:45 p.m.

Debbora Ahlgren will also participate as a panelist on the “Yield Learning – Who Gains, Who Picks Up the Tab?” panel, with moderator Rick Nelson, chief editor of Test & Measurement World and EDN.

4 to 5:30 p.m.

Jochen Rivoir of Verigy will participate in a panel with representatives from Cadence Design Systems, LogicVision and Mentor Graphics discussing the question, “Will Test Compression Run Out of Gas?”

Thurs., Oct. 30

8:30 to 10 a.m.

During Session 22, “Software to the Rescue,” Akinori Maeda will present, “A Method to Generate a Very Low-Distortion, High-Frequency Sine Waveform Using an AWG.”

8:30 to 10 a.m.

Phil Burlison and Ajay Khoche will present the latest on the STDF Fail Datalog Standard efforts as part of an Advanced Industrial Practices session.

Verigy will also participate in two of the IEEE workshops collocated with ITC this year:

D3T: IEEE Workshop on Defect and Data-driven Testing

Ajay Khoche will present “Linking Design and Test for Yield Learning through STDF,” and Jay Orbon will be a panelist.

Vision ATE 2020, Oct. 30-31

Verigy’s Eric Volkerink is general chair of Vision ATE 2020, another IEEE workshop. Ajay Khoche’s panel on “Creating Sustainable Growth – Trick or Treat!” will be presented, with Ahlgren among the panelists, and Nelson as moderator. Phil Burlison will present an imaginative scenario, “What Will a Typical IC Test Program Look Like in 2015?”

 

 

 

 

 

 

 

 

Contact:
Verigy


http://www.verigy.com/

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