Viewpoint
January 5, 2017

VIEWPOINT 2017: Rob Kavanagh, Global Business Director, Dow Electronic Materials



VIEWPOINT 2017: Rob Kavanagh, Global Business Director, Dow Electronic Materials
Rob Kavanagh, Global Business Director, Advanced Packaging Technologies, Dow Electronic Materials
Looking back at last year's predictions for fan-out wafer- and panel-level packaging, the crystal ball was a bit foggy, as the industry collectively wondered if fan-out would become a reality in mainstream consumer applications, such as smartphones and tablets.

Now with confirmation from teardowns performed by device analysts, it's been publicly confirmed that what everyone predicted is indeed true: The Apple A10 processor in the new iPhone 7 is a TSMC chip built using its integrated fan-out technology, thereby proving fan-out wafer-level packaging (FOWLP) technologies are viable for volume production.

Since the introduction of the latest version of this device, the industry is focused on building on the fan-out platform. We are beginning to see competitive differentiation coming from different outsourced semiconductor assembly and test providers, substrate manufacturers, and other foundries as they position themselves to capture growth in the segment.

Now that FOWLP has happened, we expect the focus for 2017 to be on answering some open questions: How will FOWLP be leveraged for chip integration? Will chip stacking become part of it? How many redistribution layers can it support? How does fan-out panel-level packaging (FOPLP) factor in?

Roadmap initiatives are now underway to drive these developments, and we at Dow are engaging in the roadmap activities. This collaboration is essential to optimizing the copper pillar and RDL chemistries, dielectrics and bonding materials we have been developing for this segment. These are the foundation for solutions necessary to ensure reliability and yield of both FOWLP and FOPLP.

Rob Kavanagh, Global Business Director, Advanced Packaging Technologies
Dow Electronic Materials
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